Why is the Intel(r) XScale(tm) Core Scalar?

Date: 
Wednesday, April 16, 2003 - 17:30
Location: 
TH 331
Presenter: 
Michael Morrow Intel
Abstract: 
The Intel(r) XScale(tm) core was designed to deliver high performance while providing good efficiency (MIPS/Watt). We think a good way to meet these goals is to use a scalar microarchitecture, rather than superscalar. This talk will present some rationale behind such thinking.
Bio: 

Mike Morrow has been a processor architect in the Intel(r) XScale(tm) Core design team since the first tape-out of this microarchitecture.